UPDATED. 2024-11-01 09:44 (금)
Kioxia and Western Digital announces 162-layer 3D flash memory 
Kioxia and Western Digital announces 162-layer 3D flash memory 
  • Nari Lee
  • 승인 2021.02.26 07:35
  • 댓글 0
이 기사를 공유합니다

Companies reduce die size by 40% compared to 112-layer
Image: Western Digital, Kioxia
Image: Western Digital, Kioxia

Kioxia and Western Digital announced that they have developed their Gen 6 162-layer 3D flash memory.

The latest chip, thanks to a new architecture beyond the conventional eight-stagger memory hole array, has up to 10% greater lateral cell array density compared to the Gen 5, the pair said.

The new flash memory also has 40% reduced die size compared to 112-layer version and more optimized cost, the companies said.

They also applied Circuit Under Array CMOS placement and four-plane operation, which together deliver nearly 2.4 times improvement in program performance and 10% improvement in read latency compared to Gen 5, Kioxia and Western Digital said, while I/O performance also improved by 66%.

Cost per bit reduced and manufactured bits per wafer is increased by 70% compared to the previous generation, they said.


댓글삭제
삭제한 댓글은 다시 복구할 수 없습니다.
그래도 삭제하시겠습니까?
댓글 0
댓글쓰기
계정을 선택하시면 로그인·계정인증을 통해
댓글을 남기실 수 있습니다.

  • 515, Nonhyeon-ro, Gangnam-gu, Seoul, Republic of Korea 4F, Ahsung Bldg.
  • 대표전화 : 82-2-2658-4707
  • 팩스 : 82-2-2659-4707
  • 청소년보호책임자 : Stan LEE
  • 법인명 : The Elec Inc.
  • 제호 : THE ELEC, Korea Electronics Industry Media
  • 등록번호 : 서울, 아05435
  • 등록일 : 2018-10-15
  • 발행일 : 2018-10-15
  • 발행인 : JY HAN
  • 편집인 : JY HAN
  • THE ELEC, Korea Electronics Industry Media Prohibiting unauthorized duplication,publishing,modification and distribution the material on this Site for any purpose.
  • Copyright © 2024 THE ELEC, Korea Electronics Industry Media. All rights reserved. mail to powerusr@thelec.kr
ND소프트