Chip reliability testing firm QRT said on Wednesday that it has filed a patent for developing a semiconductor device for protection against electrostatic discharge, or ESD.
The patent allows the chip to efficiently release ESD to protect the circuits, the company said.
It also allows such semiconductor devices to be designed smaller to be put in chips.
QRT said its transmission line pulse equipment, which measures the voltage and resistance of ESD to quantifiable data, played a crucial role in developing the technology on the patent.
The company said it will now be able to improve the structures of MOSFET and SCR as well as more efficient protection devices using the data from the equipment.
QRT said the technology can withstand more voltage and current compared to existing MOSFET and diode structures.
The South Korean firm said it expects the technology to be applied for SiC CMOS, DRAM, SRAM, CMOS circuits both digital and analog as well as flash chips going forward.
QRT added that it will use the patent to continue to expand its semiconductor ESD reliability testing business model, offering consulting and IP to clients.
