UPDATED. 2024-06-18 18:50 (화)
Samsung maintains hybrid bonding needed for HBM 16H
Samsung maintains hybrid bonding needed for HBM 16H
  • Noh Tae Min 기자
  • 승인 2024.06.11 09:02
  • 댓글 0
이 기사를 공유합니다

Unlike SK Hynix will continue MR-MUF in 16-stack HBM
Image: Samsung
Image: Samsung

Samsung shared in a recent paper that it believes hybrid bonding was needed to manufacture a 16-stack high-bandwidth memory (HBM).

In its paper published during the 2024 IEEE 74th Electronic Components and Technology Conference held in Colorado last month titled, in Korean, D2W (die to wafer) Copper Bonding Technology Research for HBM Stacking, the company said hybrid bonding for HBM with 16 stacks and above was a must.

Hybrid bonding is a next-generation packaging technology where when chips are stacked vertically through through-silicon-via (TSV), or microscopic copper wire, there are no bumps between the stack. They are stacked directly. Hybrid bonding is also called direct bonding for this reason.

Compared to thermal compression (TC) bonding currently used, more stacks of chips can be bonded at a lower height, while heat emission efficiency also improves.

In its paper, Samsung said the lower height was the main reason for the application of hybrid bonding. The gap between the chips must be narrowed in order for 17 chips (one base die and 16 core dies, or stacks) to be packed in a 775 micrometers form factor. 

Samsung has, up to its 12-stack HBM, used TC non-conductive film to stack the chips.

Other ways of overcoming this problem besides the application of hybrid bonding is to make the core die as thin as possible or reduce the bump pitch.

However, the two methods besides hybrid bonding are considered to be reaching their limits. A source knowledgeable on the matter said it is very difficult to make the core die thinner than 30 micrometers. In its paper, Samsung also noted that using bumps to connect the chips had limitations due to the bumps’ volume. The tech giant also noted that there was a bump short issue that made it difficult to reduce the pitch.

Samsung also shared how it plans to manufacture HBM using hybrid bonding. The logic wafer goes through chemical mechanical polishing (CMP) and plasma processes. Then the wafer goes through a deionized water rinse. The chips are then stacked. The core die, after CMP, goes through a die singulation process. The process steps after this are the same as those for the logic wafer. The plasma process and the rinse are done to activate the surface. This forms hydroxide on the surface that bonds the particles. After an anneal process, the copper is also bonded.

Samsung in April used subsidiary Semes’ hybrid bonding equipment to make a sample HBM 16H. The tech giant said the chip was operating normally. Besides Semes, BESI and Hanwha Precision Machinery are also developing hybrid bonding equipment. 

Samsung said it plans to make a sample of HBM4, which will be 16 stacks mostly, in 2025 and mass produce them in 2026.


댓글삭제
삭제한 댓글은 다시 복구할 수 없습니다.
그래도 삭제하시겠습니까?
댓글 0
댓글쓰기
계정을 선택하시면 로그인·계정인증을 통해
댓글을 남기실 수 있습니다.

  • 515, Nonhyeon-ro, Gangnam-gu, Seoul, Republic of Korea 4F, Ahsung Bldg.
  • 대표전화 : 82-2-2658-4707
  • 팩스 : 82-2-2659-4707
  • 청소년보호책임자 : Stan LEE
  • 법인명 : The Elec Inc.
  • 제호 : THE ELEC, Korea Electronics Industry Media
  • 등록번호 : 서울, 아05435
  • 등록일 : 2018-10-15
  • 발행일 : 2018-10-15
  • 발행인 : JY HAN
  • 편집인 : JY HAN
  • THE ELEC, Korea Electronics Industry Media Prohibiting unauthorized duplication,publishing,modification and distribution the material on this Site for any purpose.
  • Copyright © 2024 THE ELEC, Korea Electronics Industry Media. All rights reserved. mail to powerusr@thelec.kr
ND소프트