SK Hynix has announced that it is planning to develop a 4F2 (square) DRAM, much like its domestic rival Samsung.
The cost of extreme ultraviolet (EUV) processes has been rising fast since the commercialization of 1c DRAM, SK Hynix researcher Seo Jae Wook noted during an industry conference in Seoul on Monday.
Seo said it was time to ask whether manufacturing DRAM this way (that is, using EUV) was profitable.
In response, SK Hynix was considering manufacturing vertical gate (VG) or 3D DRAM for future DRAMs, the researcher noted.
VG is what the memory maker internally calls 4F2. Samsung calls their vertical channel transistor, or VCT.
4F2 is a much-researched cell array structure where the transistors are stacked vertically __ it is also called 3D DRAM.
From bottom to top, the source, gate, drain, and capacitor are stacked. The word line is connected to the gate, and the bit lien is connected to the source.
Having the cell array this way can reduce the die surface area by 30% compared to 6F2 DRAM.
Sources said Samsung and SK Hynix are aiming to apply 4F2 with DRAM in the 10-nanometer node and under.
SK Hynix’s Seo said with VG or 3D DRAM, the process can be designed to reduce the cost of EUV processes by half.
