SK Hynix also considering 1c for their HBM4
Samsung is preparing to tape-out its Gen 6 high-bandwidth memory (HBM) at the end of the year, TheElec has learned.
Tape-out is the last step of chip design and is where the company sends the design blueprint to the chip foundry, its partner that will manufacture the chip.
With a tape-out done at the end of the year, the sample of HBM4 will come out early next year with commercial mass production starting at the tail end of 2025.
A prototype of the chip is usually made three to four months after tape-out. Samsung is expected to make alterations in design and improve process steps after reviewing the sample.
SK Hynix is also planning to start production of its HBM4 late next year.
Both Samsung and SK Hynix is planning to use foundry for the logic die on the chip rather than use their own DRAM process as they did on prior generation HBM chips.
Samsung will use its own 4nm foundry process for the logic die while SK Hynix will use TSMC’s 5nm and 12nm processes for theirs.
Samsung is planning to use Gen 6 10nm (1c) DRAM as the memory core die of the HBM, while SK Hynix is mulling over whether to use 1c DRAM like Samsung or use Gen 5 10nm (1b) DRAM.
SK Hynix initially planned to use 1b DRAM but because Samsung is using 1c it is considering the same, sources said.
The pair’s HBM4 are expected to be used in Nvidia and AMD’s future AI accelerators.
