Samsung Electronics announced on June 26 that it would apply EUV (Extreme Ultraviolet Lithography) technology to its next generation DRAM assembly lines to streamline the chip-making process.
The world’s largest memory chipmaker said it has officially adopted the technology to cut the production time by reducing complexity. This, in turn, helps lower costs.
"We are planning to apply EUV technology the 4th generation 10nm level 1a DRAM process," said Shin Kyung-sub, a senior researcher at Samsung Electronics Semiconductor Research Institute at the 2019 Investor Forum held at Conrad Hotel. “Compared with the multi-patterning techniques conducted with the existing ArF (Argon Fluoride) technology, EUV cuts the process complexity by up to 50%.”
This is because EUV has a relatively short light wavelength of 13.5 nanometers. Short wavelengths allow for very fine patterns in a single operation.
Currently, the light wavelength of the ArF immersion exposure equipment is 193nm. Until now, the chips were manufactured by using a multi-patterning technology that had to be worked 2-4 times for fine patterns. .
Using EUV in some of the more critical pattern layers greatly reduces the number of processing steps. “Complexity will be dramatically reduced," said Shin. Experts say this more than offsets the production costs that are bound to climb when the EUV equipment is deployed. Also, if Samsung fails to introduce EUV, it actually could lead to higher costs to make the chips less competitive.
One key issue raised at the forum was, how many layers would the EUV exposure technology be applied to.
The Samsung executive tried to dodge the question, calling it a “sensitive issue.” But according to industry sources, the company appears to be planning to apply EUV to a single layer of 1z DRAM by the end of this year. At 1a, the number of layers that are applied to EUV will increase to four.
Such developments will also create a boon for EUV equipment and material suppliers; Samsung currently produces between 400,000 and 500,000 DRAMs per month, so that’s a lot of supplies.
Samsung Electronics also explained how EUV technology will be further upgraded. In order to draw a finer pattern, either the wavelengths, process variables (K1), or the NA (numerical aperture) need to be improved. Samsung Electronics plans to raise the NA from 0.33 to 0.55.
The Korean tech firm is also undergoing research on Free Electron Laser (FEL) to increase the number of wafers processed by the EUV equipment, along with E-beam technology, which has a light wavelength of only 0.124 angstrom. Considering that 1nano equals 10 angstrom, experts expect to usher in the era of this next-generation unit once the E-beam technology is deployed.
In NAND flash, Samsung introduced the High Aspect Ratio Contact (HARC) technology. HARC allows the single-stacking technology to be applied to up to 200 layer chips. This compares with Samsung’s competitors who are using double-stacking technology that involves double-stacking 36 layer or 64 layer NAND chips involving more steps and higher costs.
“We believe process upgrades affects not only our memory chips, but other areas such as logic, image sensors, PRAMs and MRAMS, meaning that new ingtechnologies can create huge synergy throughout the company,” said Shin. “We plan on maintaining the industry leadership by working together with other businesses, research institutes and schools.”